diff --git a/src/runtime2/component/component_pdl.rs b/src/runtime2/component/component_pdl.rs
index efd6a121c7e84aa016d9121884a82707feca2671..3f3450e88a7a301c828c75b40e73fa7568a59583 100644
--- a/src/runtime2/component/component_pdl.rs
+++ b/src/runtime2/component/component_pdl.rs
@@ -807,7 +807,7 @@ impl CompPDL {
         // Take all the ports ID that are in the `args` (and currently belong to
         // the creator component) and translate them into new IDs that are
         // associated with the component we're about to create
-        let mut arg_iter = ValueGroupIter::new(&mut arguments);
+        let mut arg_iter = ValueGroupPortIter::new(&mut arguments);
         while let Some(port_reference) = arg_iter.next() {
             // Create port entry for new component
             let creator_port_id = port_reference.id;
@@ -1010,13 +1010,13 @@ pub(crate) fn find_ports_in_value_group(value_group: &ValueGroup, ports: &mut Ve
     }
 }
 
-struct ValueGroupIter<'a> {
+struct ValueGroupPortIter<'a> {
     group: &'a mut ValueGroup,
     heap_stack: Vec<(usize, usize)>,
     index: usize,
 }
 
-impl<'a> ValueGroupIter<'a> {
+impl<'a> ValueGroupPortIter<'a> {
     fn new(group: &'a mut ValueGroup) -> Self {
         return Self{ group, heap_stack: Vec::new(), index: 0 }
     }
@@ -1028,7 +1028,7 @@ struct ValueGroupPortRef {
     index: usize,
 }
 
-impl<'a> Iterator for ValueGroupIter<'a> {
+impl<'a> Iterator for ValueGroupPortIter<'a> {
     type Item = ValueGroupPortRef;
 
     fn next(&mut self) -> Option<Self::Item> {